报告题目：RISC-V: Building an open, standards-based solution for accelerated AI/ML
报告时间：2024年6月6日 周四15：00
报告地点：闵行校区信息楼魔方厅
主持人：刘一清 教授
报告人：Dr. Philipp Tomsich
Abstract
This presentation showcases how RISC-V is evolving to address the challenges of AI/ML and can become the “common denominator” for future-proof, vendor-independent AI/ML solutions. The ownership of the AI/ML standardization in RISC-V is owned by the software organization, led by Dr. Philipp Tomsich, and follows a vision to provide a convergent computing environment unifying for CPU, GPU and accelerator-style workloads. We provide a brief overview of this vision and how the ongoing efforts around AI/ML in RISC-V support its implementation.
Full bio
Dr. Philipp Tomsich is theChief Technologistand Founder ofVRULL, a Software engineering company providing strategic software R&D to semiconductor companies building next-generation silicon solutions for ARMv8and RISC-Varchitectures.
Dr. Tomsich brings vast experience and expertise inruntime systems(including Java VMs, compilers, operating systems kernels, and static code analysis), high-assuranceapplications, secure/trusted boot, and embedded hardware. His earlier contributions to open-source compilers have been centred on ARMv8 and, more recently, on RISC-V. He has worked on languages and compilers for multi-core systems for over twenty years and led multiple engineering projects for high-assurance government applications.
He started his career as acompiler engineer at Silicon Graphics Inc., worked several years asa consultant in banking and government IT, and held in his early yearsteaching and research roles at the Vienna University of Technology, where he graduated with adegree and a doctorate in Computer Science.
Before VRULL, hefounded and bootstrapped Theobroma Systems, a Software and Hardware engineering company offering tailored & standard modular solutions for high-assurance computing (later acquired by Cherry GmbH).
Philipp today supports theRISC-V missionas the Vice-Chair of the RISC-V Technical Steering Committee,Chair of the Applications & Tools Software Horizontal Committeeand drives standardisation of matrix extensions as theActing Chair of the Attached Matrix Extension Task Group. In these roles, he oversees the strategy of RISC-V to address both mass-market and emerging AI/ML applications, software ecosystem outreach, development of performance modelling & dynamic instrumentation tools, and the establishment of a Unified Compute for RISC-V that blends GPGPU and CPU capabilities in a single core.
He represents the Strategic Membership Tier on theBoard of Directors of RISC-V, continuing to drive the software ecosystem perspective, alignment with ISO processes, and initiatives to make RISC-V the premier platform for AI/ML and software innovation.